Euro-Par 2024 | Mateo Valero | International European Conference on Parallel and Distributed Computing Mateo ValeroEuro-par

Mateo Valero

Mateo Valero, http://www.bsc.es/cv-mateo/ is professor of Computer Architecture at Technical University of Catalonia (UPC) and is the Founding Director of the Barcelona Supercomputing Center, where his research focuses on high performance computing architectures. He has published approximately 700 papers, has served in the organization of more than 300 International Conferences and has given more than 600 invited talks. Prof. Valero has been honored with numerous awards, among them: The Eckert-Mauchly Award 2007 by IEEE (Institute of Electrical and Electronics Engineers) and ACM (Association for Computing Machinery), the Seymour Cray Award 2015 by IEEE and the Charles Babbage 2017 by IEEE. Among other awards, Prof. Valero has received The Harry Goode Award 2009 by IEEE, The Distinguish Service Award by ACM and the Spanish National awards “Julio Rey Pastor” and “Leonardo Torres Quevedo”. Prof. Valero is a "Hall of the Fame" member of the ICT European Program (selected as one of the 25 most influents European researchers in IT during the period 1983-2008, Lyon, November 2008). In 2020 he was awarded the “HPCWire Reader’s Choice Awards” “for his exceptional leadership in HPC” and for “being an HPC pioneer since 1990 and the driving force behind the renaissance of European HPC independence”. He has received two of the 10 national research awards in Spain: the Julio Rey Pastor in Computer Science and Mathematics in 2001, and the Leonardo Torres Quevedo in engineering in 2007. He was awarded the Rey Jaime I prize in basic research in 1997. He received the Aragon Prize in 2008, and the "Creu de Sant Jordi" in 2016, which are the most important awards granted by the Governments of Aragon and Catalonia. City of Barcelona Award in 1994 and Narcís Monturiol Award, awarded by the Generalitat of Catalonia in 1994. Research Award from the “Fundació Catalana per a la Recerca i la Innovació”, highest recognition for research in Catalonia, awarded by the Government of the Generalitat, in 2006.  Honored with “Condecoración de la Orden Mexicana del Águila Azteca” (2018), highest recognition granted by the Mexican Government for a non-Mexican citizen. Prof. Valero holds Honorary Doctorate by 10 Universities, is member of 10 academies and a fellow of IEEE and ACM,  and Fellow of AAIA, Asia-Pacific Artificial Intelligence Association.

In 1998 Mateo Valero was distinguished as “Favourite Son” of his home town, Alfamén (Zaragoza) and in 2006, his native town of Alfamén named its Public School after him

European supercomputers: buying versus building

In 2017, Europe created the EuroHPC initiative and its associated legal funding structure, the “EuroHPC JU” Joint Undertaking with two main objectives. The first objective is to acquire, build and deploy world-class high performance computing (HPC) infrastructure across Europe. The second objective is to conduct research and development to build HPC hardware manufactured in Europe, as well as the applications (software) that would run on future locally developed European supercomputers.This talk will cover both objectives in detail. On the one hand, Europe has recently committed a substantial amount of money to the first goal. For example, in the June 2024 Top-500 list, 9 of the Top-20 supercomputers are from Europe. We will go deeper and describe the two main components of the heterogeneous MareNostrum 5 supercomputer, listed separately in positions 8 and 22 of the June 2024 Top-500. Installed at our Barcelona site, MareNostrum 5 represents a good illustration of the challenges of building a contemporary supercomputer; for example, space requirements dictated that BSC could no longer implement it within our Church. Therefore, the MareNostrum 5 had to be installed in a larger space; while the Church will be used to install our first Quantum Computer, thus fulfilling the prophecy made by Dan Brown in his book "Origin".

On the other hand, and as the second part of my talk, I will describe the European approach to design general Made-in-Europe processors and accelerators leveraging the RISC V Open Instruction Set Architecture (ISA).  Currently, this approach is embodied in a couple of large-scale European research projects, namely the European Processor Initiative, EUPilot, Eprocessor, as well as some nationally funded projects. I will briefly describe these projects, including the proof-of-concept chips that successfully boot Linux. I will briefly hint at the future and describe the initiatives that Europe and the BSC are pursuing with the main goal of developing software and hardware for the MareNostrum 6 supercomputer that should be a reality in 2027-2028.

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